https://sourceforge.net/p/verilog-code-collection/activity/Recent activity for verilog_code_collectionenTue, 18 Aug 2020 20:10:55 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/c7d4571ba66a2218e858e7eeb16a4e2ddc1d89c8/same Clock, synchrounous Double-BufferDanny SchneiderTue, 18 Aug 2020 20:10:55 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/c7d4571ba66a2218e858e7eeb16a4e2ddc1d89c8/https://sourceforge.net/p/verilog-code-collection/code/ci/25c95a6c8b8a03eb003310d9b41b8b7eaa00e0b1/minor commentsDanny SchneiderTue, 18 Aug 2020 20:10:55 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/25c95a6c8b8a03eb003310d9b41b8b7eaa00e0b1/https://sourceforge.net/p/verilog-code-collection/code/ci/bb2831e9f1bc319068e24e96074b983af07d5ae0/start implementing serial/parallel shift registersDanny SchneiderTue, 18 Aug 2020 20:10:55 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/bb2831e9f1bc319068e24e96074b983af07d5ae0/https://sourceforge.net/p/verilog-code-collection/code/ci/c1f9803c424db2688661a852b46bd0d3a6eb664f/replaced clocked behaviour with combinatorical code for "Double-Buffer"Danny SchneiderTue, 18 Aug 2020 20:10:55 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/c1f9803c424db2688661a852b46bd0d3a6eb664f/https://sourceforge.net/p/verilog-code-collection/code/ci/f5ff227030e9a267430a9053f44c9685b9829a0f/removed filesDanny SchneiderTue, 18 Aug 2020 20:10:55 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/f5ff227030e9a267430a9053f44c9685b9829a0f/https://sourceforge.net/p/verilog-code-collection/code/ci/4b9f70f48ac6b3d42e7d8e287f3aa0bf81073ee9/(re)stored both variants of doublebuffer - the clocked version and the versionDanny SchneiderTue, 18 Aug 2020 20:10:55 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/4b9f70f48ac6b3d42e7d8e287f3aa0bf81073ee9/https://sourceforge.net/p/verilog-code-collection/code/ci/7854ee57f6f96665264bee919f4330203deacd01/cleanupDanny SchneiderSat, 20 Oct 2018 13:10:23 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/7854ee57f6f96665264bee919f4330203deacd01/https://sourceforge.net/p/verilog-code-collection/code/ci/a424be02a9c3b23a1eeb0b24077583d02b490a99/added spielwieseDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/a424be02a9c3b23a1eeb0b24077583d02b490a99/https://sourceforge.net/p/verilog-code-collection/code/ci/9dfb1bf7db4963209ece52e1d49f286fe85981e6/precommit: adding missing changes for 159a37fe260f55d8f4f2e2e9dcd8d71dd9caf16dDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/9dfb1bf7db4963209ece52e1d49f286fe85981e6/https://sourceforge.net/p/verilog-code-collection/code/ci/23afe62d26a91dcdcd613891736b610fd37b67c4/generic combinatorical N to 1 MuxerDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/23afe62d26a91dcdcd613891736b610fd37b67c4/https://sourceforge.net/p/verilog-code-collection/code/ci/b8bc61e618b3904cf362ba11f6979118d97bc532/Adding CommentsDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/b8bc61e618b3904cf362ba11f6979118d97bc532/https://sourceforge.net/p/verilog-code-collection/code/ci/4a1947623b9dfc83d5f959b20162801c6969d935/The current code only supports Left Shifts,Danny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/4a1947623b9dfc83d5f959b20162801c6969d935/https://sourceforge.net/p/verilog-code-collection/code/ci/6519c756edb6446e11b17abc8877abf96e24e856/remove autogenerated simulator output fileDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/6519c756edb6446e11b17abc8877abf96e24e856/https://sourceforge.net/p/verilog-code-collection/code/ci/f09e1ea606d1ceadc1c16dea7c570c9b1b0326ab/Reworked 4 of the Major subcomponents with the "new" but correct methodDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/f09e1ea606d1ceadc1c16dea7c570c9b1b0326ab/https://sourceforge.net/p/verilog-code-collection/code/ci/a5ef7053e0bcd8cd243b48d9964152d72fef594b/added templatesDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/a5ef7053e0bcd8cd243b48d9964152d72fef594b/https://sourceforge.net/p/verilog-code-collection/code/ci/159a37fe260f55d8f4f2e2e9dcd8d71dd9caf16d/decimal & grey up-counter with minimal InterfacesDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/159a37fe260f55d8f4f2e2e9dcd8d71dd9caf16d/https://sourceforge.net/p/verilog-code-collection/code/ci/3cd55dcd2a86eb10d496b0cce3fe6d6cca35a80c/Minor changeDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/3cd55dcd2a86eb10d496b0cce3fe6d6cca35a80c/https://sourceforge.net/p/verilog-code-collection/code/ci/83c7bdce8c629af1429e9634828d8733c9cd08e1/Added Matrix Multiplexer Files:Danny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/83c7bdce8c629af1429e9634828d8733c9cd08e1/https://sourceforge.net/p/verilog-code-collection/code/ci/3811efb552035b510af0177e8816d0bd2ab1f803/partial finished Trigger UnitDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/3811efb552035b510af0177e8816d0bd2ab1f803/https://sourceforge.net/p/verilog-code-collection/code/ci/d08da2e1340e048300dab461e6d5619dc90587ee/barrelshifter => little corretion and refactoringDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/d08da2e1340e048300dab461e6d5619dc90587ee/https://sourceforge.net/p/verilog-code-collection/code/ci/8979f9d25fb050c417ee957209beca51b2336e4d/added i2c prototype codeDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/8979f9d25fb050c417ee957209beca51b2336e4d/https://sourceforge.net/p/verilog-code-collection/code/ci/7bd4951d3a8a5b77e635ecbaf6218a9bf44094b4/add Signal Config for GTKWaveDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/7bd4951d3a8a5b77e635ecbaf6218a9bf44094b4/https://sourceforge.net/p/verilog-code-collection/code/ci/f5f44d48a40967cf34c40d6b9eb8f7913ce70f1b/initial commit: syncronize filesDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/f5f44d48a40967cf34c40d6b9eb8f7913ce70f1b/https://sourceforge.net/p/verilog-code-collection/code/ci/33a73405dd47c80566b2628f55a07307bc2dff67/add missing muxer filesDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/33a73405dd47c80566b2628f55a07307bc2dff67/https://sourceforge.net/p/verilog-code-collection/code/ci/e9144ac6ba6324e7ee324875b837b1b12ec5f5a2/Tested "new" but correct method for multifile icarus verilog projects without 'includeDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/e9144ac6ba6324e7ee324875b837b1b12ec5f5a2/https://sourceforge.net/p/verilog-code-collection/code/ci/951d43a76b02939df0be265e470322a8b95f3917/Added Testbench for MatrixMux2,Danny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/951d43a76b02939df0be265e470322a8b95f3917/https://sourceforge.net/p/verilog-code-collection/code/ci/3be92af19bcae3d3e550fdcf3534256c3653e924/added knowhowDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/3be92af19bcae3d3e550fdcf3534256c3653e924/https://sourceforge.net/p/verilog-code-collection/code/ci/b287b3ace1011baf07bb89675974ef97ebb260d0/added C_code for showing Priorisation FormulaDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/b287b3ace1011baf07bb89675974ef97ebb260d0/https://sourceforge.net/p/verilog-code-collection/code/ci/95f3294495756408c0d8c2d18ff93bf428179e39/adding AC-KoMa Trigger State MachineDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/95f3294495756408c0d8c2d18ff93bf428179e39/https://sourceforge.net/p/verilog-code-collection/code/ci/39e436ce0aeecf5739e1a062a33c6c308e2b7045/snapshotDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/39e436ce0aeecf5739e1a062a33c6c308e2b7045/https://sourceforge.net/p/verilog-code-collection/code/ci/d0d999f6a160839f093d94402def35606e00577f/Added a usage comment to barrelshifterDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/d0d999f6a160839f093d94402def35606e00577f/https://sourceforge.net/p/verilog-code-collection/code/ci/51bf4fe698da49628ff6da27a58c70c047957d69/added a bunch of missing filesDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/51bf4fe698da49628ff6da27a58c70c047957d69/https://sourceforge.net/p/verilog-code-collection/code/ci/cb29899d23dcad33fc436952f5b65a1d570262c1/cleanup + commentsDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/cb29899d23dcad33fc436952f5b65a1d570262c1/https://sourceforge.net/p/verilog-code-collection/code/ci/ceb7a424cb85dc317073f1987a90158563f5a3ed/added GTKWave Signal Config for SynchronizersDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/ceb7a424cb85dc317073f1987a90158563f5a3ed/https://sourceforge.net/p/verilog-code-collection/code/ci/56f852a4600f1e2582ec12226fab82e7ead5927d/reworked the fast to slow synchronizerDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/56f852a4600f1e2582ec12226fab82e7ead5927d/https://sourceforge.net/p/verilog-code-collection/code/ci/41895e0cea128db090517b9a900f29dca03c7381/First Version of BarrelshifterDanny SchneiderSun, 11 Mar 2018 12:59:22 -0000https://sourceforge.net/p/verilog-code-collection/code/ci/41895e0cea128db090517b9a900f29dca03c7381/